1. Field of the Invention
The present invention relates to an improvement in a semiconductor device (to be referred to as a BiMOS hereinafter) mounting both a bipolar transistor and a MOS transistor.
2. Description of the Related Art
In a BiMOS technique, a logic gate constituted by a combination of a bipolar transistor, which allows an integrated circuit to operate at high speed, and a MOS transistor, which allows an increase in integration density of elements constituting the integrated circuit and realizes a reduction in power consumption of the integrated circuit, is formed on a single chip.
In the process of manufacturing a conventional BiMOS, the gate electrode of a MOS transistor and the outer base electrode of a bipolar transistor are formed from the same film. In this case, in order to ensure a sufficient breakdown voltage of the gate electrode, the gate electrode is oxidized after it is formed.
In this oxidation step, however, an emitter opening portion of the bipolar transistor is also oxidized. This causes accelerated diffusion of boron in the inner base of the bipolar transistor, resulting in an increase in depth of the inner base. As a result, the performance of the bipolar transistor considerably deteriorates.
As described above, according to the conventional BiMOS, in the oxidation step after the gate electrode of a MOS transistor and the outer base electrode of the bipolar transistor are formed, the depth of an inner base is increased to cause a considerable deterioration in the performance of the bipolar transistor.